This commit is contained in:
TriForceX
2021-10-07 19:21:30 -03:00
parent b3ecc6e32d
commit 5ce34ced3d
21 changed files with 1394 additions and 204 deletions

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@@ -0,0 +1,328 @@
From 0824d6819857f306583592bce96315893f91bd84 Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Wed, 20 Jan 2021 23:26:29 +0100
Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
-mcpu=niagara2 -fPIE)"
This reverts commit 0a83f1a441d7aaadecb368c237b6ee70bd7b91d6.
Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
instruction messages.
gcc 8.3, 9.2 are the latest working gcc version.
git bisect between gcc 8.4 and 8.4 allowed to identify
the commit that introcuce the regression.
Reverting this patch allowed to produce a working rootfs.
Reported to gcc:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
---
gcc/config/sparc/sparc-protos.h | 1 -
gcc/config/sparc/sparc.c | 121 +++++++-----------
gcc/config/sparc/sparc.md | 5 +-
.../gcc.c-torture/compile/20191108-1.c | 14 --
gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
7 files changed, 53 insertions(+), 94 deletions(-)
delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 5f9999a669c..37452b06415 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
extern int sparc_split_reg_reg_legitimate (rtx, rtx);
extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
-extern const char *output_load_pcrel_sym (rtx *);
extern const char *output_ubranch (rtx, rtx_insn *);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
extern const char *output_return (rtx_insn *);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index d0843102148..14d112d8ca8 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4157,6 +4157,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
static bool
sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
+ /* After IRA has run in PIC mode, it is too late to put anything into the
+ constant pool if the PIC register hasn't already been initialized. */
+ if ((lra_in_progress || reload_in_progress)
+ && flag_pic
+ && !crtl->uses_pic_offset_table)
+ return true;
+
switch (GET_CODE (x))
{
case CONST_INT:
@@ -4192,11 +4199,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
}
/* Global Offset Table support. */
-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
-static GTY(()) rtx got_register_rtx = NULL_RTX;
static GTY(()) rtx got_helper_rtx = NULL_RTX;
-
-static GTY(()) bool got_helper_needed = false;
+static GTY(()) rtx got_register_rtx = NULL_RTX;
+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
/* Return the SYMBOL_REF for the Global Offset Table. */
@@ -4209,6 +4214,27 @@ sparc_got (void)
return got_symbol_rtx;
}
+#ifdef HAVE_GAS_HIDDEN
+# define USE_HIDDEN_LINKONCE 1
+#else
+# define USE_HIDDEN_LINKONCE 0
+#endif
+
+static void
+get_pc_thunk_name (char name[32], unsigned int regno)
+{
+ const char *reg_name = reg_names[regno];
+
+ /* Skip the leading '%' as that cannot be used in a
+ symbol name. */
+ reg_name += 1;
+
+ if (USE_HIDDEN_LINKONCE)
+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
+ else
+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
+}
+
/* Wrapper around the load_pcrel_sym{si,di} patterns. */
static rtx
@@ -4228,78 +4254,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
return insn;
}
-/* Output the load_pcrel_sym{si,di} patterns. */
-
-const char *
-output_load_pcrel_sym (rtx *operands)
-{
- if (flag_delayed_branch)
- {
- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
- }
- else
- {
- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" nop", NULL);
- }
-
- if (operands[2] == got_helper_rtx)
- got_helper_needed = true;
-
- return "";
-}
-
-#ifdef HAVE_GAS_HIDDEN
-# define USE_HIDDEN_LINKONCE 1
-#else
-# define USE_HIDDEN_LINKONCE 0
-#endif
-
/* Emit code to load the GOT register. */
void
load_got_register (void)
{
- rtx insn;
+ if (!got_register_rtx)
+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
if (TARGET_VXWORKS_RTP)
- {
- if (!got_register_rtx)
- got_register_rtx = pic_offset_table_rtx;
-
- insn = gen_vxworks_load_got ();
- }
+ emit_insn (gen_vxworks_load_got ());
else
{
- if (!got_register_rtx)
- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
-
/* The GOT symbol is subject to a PC-relative relocation so we need a
helper function to add the PC value and thus get the final value. */
if (!got_helper_rtx)
{
char name[32];
-
- /* Skip the leading '%' as that cannot be used in a symbol name. */
- if (USE_HIDDEN_LINKONCE)
- sprintf (name, "__sparc_get_pc_thunk.%s",
- reg_names[REGNO (got_register_rtx)] + 1);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
- REGNO (got_register_rtx));
-
+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
}
- insn
- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
+ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
+ got_helper_rtx));
}
-
- emit_insn (insn);
}
/* Ensure that we are not using patterns that are not OK with PIC. */
@@ -5464,7 +5442,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
return true;
/* GOT register (%l7) if needed. */
- if (got_register_rtx && regno == REGNO (got_register_rtx))
+ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
return true;
/* If the function accesses prior frames, the frame pointer and the return
@@ -12507,9 +12485,10 @@ static void
sparc_file_end (void)
{
/* If we need to emit the special GOT helper function, do so now. */
- if (got_helper_needed)
+ if (got_helper_rtx)
{
const char *name = XSTR (got_helper_rtx, 0);
+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
#ifdef DWARF2_UNWIND_INFO
bool do_cfi;
#endif
@@ -12546,22 +12525,17 @@ sparc_file_end (void)
#ifdef DWARF2_UNWIND_INFO
do_cfi = dwarf2out_do_cfi_asm ();
if (do_cfi)
- output_asm_insn (".cfi_startproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_startproc\n");
#endif
if (flag_delayed_branch)
- {
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
- }
+ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
+ reg_name, reg_name);
else
- {
- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" nop", NULL);
- }
+ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
+ reg_name, reg_name);
#ifdef DWARF2_UNWIND_INFO
if (do_cfi)
- output_asm_insn (".cfi_endproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_endproc\n");
#endif
}
@@ -13056,10 +13030,7 @@ sparc_init_pic_reg (void)
edge entry_edge;
rtx_insn *seq;
- /* In PIC mode, we need to always initialize the PIC register if optimization
- is enabled, because we are called from IRA and LRA may later force things
- to the constant pool for optimization purposes. */
- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
+ if (!crtl->uses_pic_offset_table)
return;
start_sequence ();
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 6e9ccb4ecfd..8fb0fa11aed 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1601,7 +1601,10 @@
(clobber (reg:P O7_REG))]
"REGNO (operands[0]) == INTVAL (operands[3])"
{
- return output_load_pcrel_sym (operands);
+ if (flag_delayed_branch)
+ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
+ else
+ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
}
[(set (attr "type") (const_string "multi"))
(set (attr "length")
diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
deleted file mode 100644
index 7929751bb06..00000000000
--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* PR target/92095 */
-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
-
-typedef union {
- double a;
- int b[2];
-} c;
-
-double d(int e)
-{
- c f;
- (&f)->b[0] = 15728640;
- return e ? -(&f)->a : (&f)->a;
-}
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 52d6ab2b688..86dddfb09e6 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie" } */
+/* { dg-options "-O" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index c6121b958c3..019feee335c 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
+/* { dg-options "-O -mno-vis3 -mno-vis4" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index f00283f6e7b..67d4ac38095 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mvis3" } */
+/* { dg-options "-O -mvis3" } */
#include <stdbool.h>
#include <stdint.h>
--
2.30.2

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@@ -0,0 +1,200 @@
From 1dad3f95ffcd1871ca670a13a06fbedb1c3ce509 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:44 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR 99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.text (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 12 +++++++++++-
5 files changed, 76 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index 5fa5425aa2b..88613f9596b 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1089,7 +1096,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index 23db771d8fb..f1646d16dfd 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -35,6 +37,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 03c9b8d0bba..8e035075f8a 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -21,6 +21,9 @@
; See the GCC internals manual (options.texi) for a description of
; this file's format.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Enable generation of hardware divide (l.div, l.divu) instructions. This is the
@@ -63,6 +66,22 @@ When -mhard-float is selected, enables generation of unordered floating point
compare and set flag (lf.sfun*) instructions. By default functions from libgcc
are used to perform unordered floating point compare and set flag operations.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index eabeec944e7..eda350c99ec 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1102,7 +1102,8 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
-msoft-float -mhard-float -mdouble-float -munordered-float @gol
--mcmov -mror -mrori -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -25111,6 +25112,15 @@ Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
@code{l.slli}) instructions. By default extra instructions will be generated
to store the immediate to a register first.
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@end table
--
2.25.1

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@@ -0,0 +1,60 @@
From 0354e007a6235df81e208fa89cbf1571a8b56975 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:45 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR 99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index c529cc40f0c..ddf0033e28c 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1127,12 +1127,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.25.1

View File

@@ -0,0 +1,125 @@
From 745dae5923aba02982563481d75a21595df22ff8 Mon Sep 17 00:00:00 2001
From: Tamar Christina <tamar.christina@arm.com>
Date: Fri, 21 May 2021 10:30:59 +0100
Subject: [PATCH] libsanitizer: Remove cyclades from libsanitizer
The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.
libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.
Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.
As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.
[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379
(cherry picked from commit f7c5351552387bd43f6ca3631016d7f0dfe0f135)
libsanitizer/ChangeLog:
PR sanitizer/100379
* sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry-pick
llvm-project revision f7c5351552387bd43f6ca3631016d7f0dfe0f135.
* sanitizer_common/sanitizer_platform_limits_posix.cpp: Likewise.
* sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
---
.../sanitizer_common_interceptors_ioctl.inc | 9 ---------
.../sanitizer_platform_limits_posix.cpp | 11 -----------
.../sanitizer_platform_limits_posix.h | 10 ----------
3 files changed, 30 deletions(-)
diff --git a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
index 7f181258eab..b7da6598755 100644
--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -370,15 +370,6 @@ static void ioctl_table_fill() {
#if SANITIZER_GLIBC
// _(SIOCDEVPLIP, WRITE, struct_ifreq_sz); // the same as EQL_ENSLAVE
- _(CYGETDEFTHRESH, WRITE, sizeof(int));
- _(CYGETDEFTIMEOUT, WRITE, sizeof(int));
- _(CYGETMON, WRITE, struct_cyclades_monitor_sz);
- _(CYGETTHRESH, WRITE, sizeof(int));
- _(CYGETTIMEOUT, WRITE, sizeof(int));
- _(CYSETDEFTHRESH, NONE, 0);
- _(CYSETDEFTIMEOUT, NONE, 0);
- _(CYSETTHRESH, NONE, 0);
- _(CYSETTIMEOUT, NONE, 0);
_(EQL_EMANCIPATE, WRITE, struct_ifreq_sz);
_(EQL_ENSLAVE, WRITE, struct_ifreq_sz);
_(EQL_GETMASTRCFG, WRITE, struct_ifreq_sz);
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
index 35a690cba5c..6e5c330b98e 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
@@ -143,7 +143,6 @@ typedef struct user_fpregs elf_fpregset_t;
# include <sys/procfs.h>
#endif
#include <sys/user.h>
-#include <linux/cyclades.h>
#include <linux/if_eql.h>
#include <linux/if_plip.h>
#include <linux/lp.h>
@@ -460,7 +459,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#if SANITIZER_GLIBC
unsigned struct_ax25_parms_struct_sz = sizeof(struct ax25_parms_struct);
- unsigned struct_cyclades_monitor_sz = sizeof(struct cyclades_monitor);
#if EV_VERSION > (0x010000)
unsigned struct_input_keymap_entry_sz = sizeof(struct input_keymap_entry);
#else
@@ -824,15 +822,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
- unsigned IOCTL_CYGETDEFTHRESH = CYGETDEFTHRESH;
- unsigned IOCTL_CYGETDEFTIMEOUT = CYGETDEFTIMEOUT;
- unsigned IOCTL_CYGETMON = CYGETMON;
- unsigned IOCTL_CYGETTHRESH = CYGETTHRESH;
- unsigned IOCTL_CYGETTIMEOUT = CYGETTIMEOUT;
- unsigned IOCTL_CYSETDEFTHRESH = CYSETDEFTHRESH;
- unsigned IOCTL_CYSETDEFTIMEOUT = CYSETDEFTIMEOUT;
- unsigned IOCTL_CYSETTHRESH = CYSETTHRESH;
- unsigned IOCTL_CYSETTIMEOUT = CYSETTIMEOUT;
unsigned IOCTL_EQL_EMANCIPATE = EQL_EMANCIPATE;
unsigned IOCTL_EQL_ENSLAVE = EQL_ENSLAVE;
unsigned IOCTL_EQL_GETMASTRCFG = EQL_GETMASTRCFG;
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
index ad358eef8b7..cba41ba5494 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -983,7 +983,6 @@ extern unsigned struct_vt_mode_sz;
#if SANITIZER_LINUX && !SANITIZER_ANDROID
extern unsigned struct_ax25_parms_struct_sz;
-extern unsigned struct_cyclades_monitor_sz;
extern unsigned struct_input_keymap_entry_sz;
extern unsigned struct_ipx_config_data_sz;
extern unsigned struct_kbdiacrs_sz;
@@ -1328,15 +1327,6 @@ extern unsigned IOCTL_VT_WAITACTIVE;
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
-extern unsigned IOCTL_CYGETDEFTHRESH;
-extern unsigned IOCTL_CYGETDEFTIMEOUT;
-extern unsigned IOCTL_CYGETMON;
-extern unsigned IOCTL_CYGETTHRESH;
-extern unsigned IOCTL_CYGETTIMEOUT;
-extern unsigned IOCTL_CYSETDEFTHRESH;
-extern unsigned IOCTL_CYSETDEFTIMEOUT;
-extern unsigned IOCTL_CYSETTHRESH;
-extern unsigned IOCTL_CYSETTIMEOUT;
extern unsigned IOCTL_EQL_EMANCIPATE;
extern unsigned IOCTL_EQL_ENSLAVE;
extern unsigned IOCTL_EQL_GETMASTRCFG;
--
2.27.0

View File

@@ -0,0 +1,58 @@
diff --git a/config/picflag.m4 b/config/picflag.m4
--- a/config/picflag.m4
+++ b/config/picflag.m4
@@ -34,7 +22,7 @@
i[[34567]]86-*-nto-qnx*)
# QNX uses GNU C++, but need to define -shared option too, otherwise
# it will coredump.
- $1='-fPIC -shared'
+ $1='-fno-PIC'
;;
i[[34567]]86-pc-msdosdjgpp*)
# DJGPP does not support shared libraries at all.
@@ -42,7 +30,7 @@
ia64*-*-hpux*)
# On IA64 HP-UX, PIC is the default but the pic flag
# sets the default TLS model and affects inlining.
- $1=-fPIC
+ $1=-fno-PIC
;;
mips-sgi-irix6*)
# PIC is the default.
@@ -54,30 +42,30 @@
# Some targets support both -fPIC and -fpic, but prefer the latter.
# FIXME: Why?
i[[34567]]86-*-* | x86_64-*-*)
- $1=-fpic
+ $1=-fno-PIC
;;
# FIXME: Override -fPIC default in libgcc only?
sh-*-linux* | sh[[2346lbe]]*-*-linux*)
- $1=-fpic
+ $1=-fno-PIC
;;
# FIXME: Simplify to sh*-*-netbsd*?
sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
sh64-*-netbsd* | sh64l*-*-netbsd*)
- $1=-fpic
+ $1=-fno-PIC
;;
# Default to -fPIC unless specified otherwise.
*)
- $1=-fPIC
+ $1=-fno-PIC
;;
esac
# If the user explicitly uses -fpic/-fPIC, keep that.
case "${m4_bpatsubsts($1, PICFLAG, CFLAGS)}" in
*-fpic*)
- $1=-fpic
+ $1=-fno-PIC
;;
*-fPIC*)
- $1=-fPIC
+ $1=-fno-PIC
;;
esac
])

View File

@@ -0,0 +1,11 @@
--- a/libgcc/Makefile.in
+++ n/libgcc/Makefile.in
@@ -253,7 +253,7 @@
# Additional target-dependent options for compiling libgcc2.a.
HOST_LIBGCC2_CFLAGS =
-PICFLAG = @PICFLAG@
+PICFLAG =
CET_FLAGS = @CET_FLAGS@

View File

@@ -0,0 +1,6 @@
--- a/libgcc/config/t-libgcc-pic
+++ b/libgcc/config/t-libgcc-pic
@@ -1,2 +1,2 @@
# Compile libgcc2.a with pic.
-HOST_LIBGCC2_CFLAGS += $(PICFLAG)
+HOST_LIBGCC2_CFLAGS +=

View File

@@ -53,6 +53,21 @@ config BR2_GCC_VERSION_10_X
depends on !BR2_csky
select BR2_TOOLCHAIN_GCC_AT_LEAST_10
config BR2_GCC_VERSION_11_X
bool "gcc 11.x"
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE
# C-SKY sk610 needs abiv1, which is not supported in
# upstream gcc. C-SKY gcc upstream support not tested
# with upstream binutils and glibc.
depends on !BR2_csky
# uClibc-ng broken on sparc due to recent gcc changes
# that need to be reverted since gcc 8.4, 9.3 and 10.1.
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
depends on !BR2_sparc
select BR2_TOOLCHAIN_GCC_AT_LEAST_11
endchoice
# libcilkrts was introduced in gcc 4.9 and removed in gcc 8.x
@@ -77,7 +92,8 @@ config BR2_GCC_VERSION
string
default "8.4.0" if BR2_GCC_VERSION_8_X
default "9.3.0" if BR2_GCC_VERSION_9_X
default "10.2.0" if BR2_GCC_VERSION_10_X
default "10.3.0" if BR2_GCC_VERSION_10_X
default "11.2.0" if BR2_GCC_VERSION_11_X
default "arc-2020.03-release" if BR2_GCC_VERSION_ARC
default "48152afb96c59733d5bc79e3399bb7b3d4b44266" if BR2_GCC_VERSION_CSKY

View File

@@ -3,7 +3,9 @@ sha512 6de904f552a02de33b11ef52312bb664396efd7e1ce3bbe37bfad5ef617f133095b3767b
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-9.3.0/sha512.sum
sha512 4b9e3639eef6e623747a22c37a904b4750c93b6da77cf3958d5047e9b5ebddb7eebe091cc16ca0a227c0ecbd2bf3b984b221130f269a97ee4cc18f9cf6c444de gcc-9.3.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-10.2.0/sha512.sum
sha512 42ae38928bd2e8183af445da34220964eb690b675b1892bbeb7cd5bb62be499011ec9a93397dba5e2fb681afadfc6f2767d03b9035b44ba9be807187ae6dc65e gcc-10.2.0.tar.xz
sha512 2b2dd7453d48a398c29eaebd1422b70341001b8c90a62aee51e83344e7fdd8a8e45f82a4a9165bd7edc76dada912c932f4b6632c5636760fec4c5d7e402b3f86 gcc-10.3.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-11.2.0/sha512.sum
sha512 d53a0a966230895c54f01aea38696f818817b505f1e2bfa65e508753fcd01b2aedb4a61434f41f3a2ddbbd9f41384b96153c684ded3f0fa97c82758d9de5c7cf gcc-11.2.0.tar.xz
# Locally calculated (fetched from Github)
sha512 09ad77fce757d77f2db49cd049b78861abfa5c1c6c3be76228815ec2b15810c1985525c48b0300e83e88f3fa33dee0062f34790cc8b6bc2fa6b0301595acf42b gcc-arc-2020.03-release.tar.gz