From 365b46cad32936ef882f90223ec10bb3002bd379 Mon Sep 17 00:00:00 2001 From: yuyi Date: Sat, 4 Dec 2021 02:00:00 +0800 Subject: [PATCH] cgen: fix match sumtype print var aggregate error (#12667) --- vlib/v/gen/c/fn.v | 23 +++++++++++++++---- ...tch_sumtype_var_aggregate_print_var_test.v | 13 +++++++++++ 2 files changed, 32 insertions(+), 4 deletions(-) create mode 100644 vlib/v/tests/match_sumtype_var_aggregate_print_var_test.v diff --git a/vlib/v/gen/c/fn.v b/vlib/v/gen/c/fn.v index 62769f8dce..bd04db3277 100644 --- a/vlib/v/gen/c/fn.v +++ b/vlib/v/gen/c/fn.v @@ -832,11 +832,20 @@ fn (mut g Gen) method_call(node ast.CallExpr) { return } } - } else if node.left is ast.Ident && g.comptime_var_type_map.len > 0 { + } else if node.left is ast.Ident { if node.left.obj is ast.Var { - rec_type = node.left.obj.typ - g.gen_expr_to_string(node.left, rec_type) - return + if g.comptime_var_type_map.len > 0 { + rec_type = node.left.obj.typ + g.gen_expr_to_string(node.left, rec_type) + return + } else if node.left.obj.smartcasts.len > 0 { + cast_sym := g.table.get_type_symbol(node.left.obj.smartcasts.last()) + if cast_sym.info is ast.Aggregate { + rec_type = cast_sym.info.types[g.aggregate_type_idx] + g.gen_expr_to_string(node.left, rec_type) + return + } + } } } g.get_str_fn(rec_type) @@ -1175,6 +1184,12 @@ fn (mut g Gen) fn_call(node ast.CallExpr) { } else if expr is ast.Ident { if expr.obj is ast.Var { typ = expr.obj.typ + if expr.obj.smartcasts.len > 0 { + cast_sym := g.table.get_type_symbol(expr.obj.smartcasts.last()) + if cast_sym.info is ast.Aggregate { + typ = cast_sym.info.types[g.aggregate_type_idx] + } + } } } g.gen_expr_to_string(expr, typ) diff --git a/vlib/v/tests/match_sumtype_var_aggregate_print_var_test.v b/vlib/v/tests/match_sumtype_var_aggregate_print_var_test.v new file mode 100644 index 0000000000..ca317c34be --- /dev/null +++ b/vlib/v/tests/match_sumtype_var_aggregate_print_var_test.v @@ -0,0 +1,13 @@ +type Bug = i64 | u64 + +fn test_match_sumtype_var_aggregate_print_var() { + f := Bug(i64(-17)) + ret := match f { + u64, i64 { + println(f) + println(f.str()) + f.str() + } + } + assert ret == '-17' +}